If you are in the Danger Scenario, you need the fixes below. But first, let’s look at the root cause using the datasheet’s power topology.

The hypothesis for this paper is that the datasheet relies on idealized JEDEC standard test conditions which are not representative of the high-density PCBs used in modern CX31993 applications.

Applying small VRM heatsinks and thermal pads to the internal PCBA has been shown to drop operating temperatures from to roughly

Some versions of these dongles have "exclusive mode" drivers. Ensure you aren't using a "high performance" power profile in your OS that prevents the chip from entering low-power states between tracks.